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5.2.4 - ConfigTimerClock

Writes and read the timer clock configuration.

Table 5.2.4-1. ConfigTimerClock Command Response

Command:      
Byte      
0 Checksum8    
1 0xF8    
2 0x02    
3 0x0A    
4 Checksum16 (LSB)    
5 Checksum16 (MSB)    
6 Reserved    
7 Reserved    
8 TimerClockConfig    
    Bit 7: Configure the clock 
    Bits 2-0: TimerClockBase 
      b000: 4 MHz
      b001: 12 MHz
      b010: 48 MHz (Default)
      b011: 1 MHz /Divisor
      b100: 4 MHz /Divisor
      b101: 12 MHz /Divisor
      b110: 48 MHz /Divisor
9 TimerClockDivisor ( 0 = ÷256 )   
       
Response:      
Byte      
0 Checksum8    
1 0xF8    
2 0x02    
3 0x0A    
4 Checksum16 (LSB)    
5 Checksum16 (MSB)    
6 Errorcode    
7 Reserved    
8 TimerClockConfig    
9 TimerClockDivisor ( 0 = ÷256 )   
  • TimerClockConfig: Bit 7 determines whether the new TimerClockBase and TimerClockDivisor are written, or if just a read is performed. Bits 0-2 specify the TimerClockBase. If TimerClockBase is 3-6, then Counter0 is not available.
  • TimerClockDivisor: The base timer clock is divided by this value, or divided by 256 if this value is 0. Only applies if TimerClockBase is 3-6.