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2.9.1.9 - Timer Stop Input (Mode 9)

This mode should only be assigned to Timer1 or Timer3.  On every rising edge seen by the external pin, this mode increments a 16-bit register.  When that register matches the specified timer value (stop count value), the adjacent even timer (Timer0 or Timer2) is stopped.  The range for the stop count value is 1-65535.  Generally, the signal applied to TimerOdd is from TimerEven, which is configured in some output timer mode.  One place where this might be useful is for stepper motors, allowing control over a certain number of steps.

Note that the timer is counting from the external pin like other input timer modes, so you must connect something to the stop timer input pin.  For example, if you are using Timer1 to stop Timer0 which is outputting pulses, you must connect a jumper from Timer0 to Timer1.

Once this timer reaches the specified stop count value, and stops the adjacent timer, the timers must be reconfigured to restart the output.

When TimerEven is stopped, it is still enabled but just not outputting anything. Thus rather than returning to whatever previous digital I/O state was on that terminal, it goes to the state “digital-input” (which has a 100 kΩ pull-up to 3.3 volts). That means the best results are generally obtained if the terminal used by TimerEven was initially configured as digital input (factory default), rather than output-high or output-low.  This will result in negative going pulses, so if you need positive going pulses consider using a simple inverter IC such as the CD74ACT540E from TI.

The MSW of the read from this timer mode returns the number of edges counted, but does not increment past the stop count value.  The LSW of the read returns edges waiting for.

 

Edge Rate Limits

This edge-detecting timer mode requires processing resources as an interrupt is required to handle each edge.  See more about edge rate limits in Section 2.9.2.

 

5 comments

> "The range for the stop count value is 1-65535"

So what is a value of 0 (zero) used for. Would that mean it doesn't stop a timer? In that case would using a stop timer with a value of 0 for this effectively make this another counter? We might be needing 3 counters as I don't think we can achieve what we need with 2 counters and a timer.

It would probably stop the adjacent timer when the count rolls from 65535 to 0, but not sure.  Sounds like you want mode 5 which is Firmware Counter Input.

I take it there is no 'internal connection' from Timer0 to Timer1.

I found that the only way to get this (TIMERSTOP) to work (sending 'x' number of pulses of a PWM train) is to physically jumper the output of Timer0 (Fio6 or pin 3 on the DB37 for me) to that of Timer1 (Fio7 or pin21 on the DB37).

Is this correct? (If it is, it WASN'T CLEAR to me and I wasted a fair bit of time trying to figure out how to get this to work). If this isn't correct, is there something wrong with my labjack or how do you get this to work without jumpering the connections? This would clearly require Timer1 being a Digital Input signal - having it hardwired to the output of Timer0.

I would guess the advantage of this is that one can then use an external clock or count a series of events to then shut off the PWM train - which could come in handy. For example, you could count the actual number of pulses a device receives (or has acted upon) as compared to how many pulses you have sent.

 

Sorry that was not clear.  I just bolded the "external pin" text in the 1st paragraph and added the new 2nd paragraph to emphasize this fact.

What you have mentioned is a possible advantage, but the real reason is that an internal connection is not possible in hardware.

Thanks, I understand. I misunderstood the statement at the beginning of the timer section (all PWM timers share the same clock) to mean that Timer1 in TimeStop mode would be counting ticks on the same clock as Timer0.

Thanks for the quick response.