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5.2.14 - Watchdog

Requires U3 hardware version 1.21. Controls a firmware based watchdog timer. Unattended systems requiring maximum up-time might use this capability to reset the U3 or the entire system. When any of the options are enabled, an internal timer is enabled which resets on any incoming USB communication. If this timer reaches the defined TimeoutPeriod before being reset, the specified actions will occur. Note that while streaming, data is only going out, so some other command will have to be called periodically to reset the watchdog timer.

If the watchdog is accidentally configured to reset the processor with a very low timeout period (such as 1 second), it could be difficult to establish any communication with the device. In such a case, the reset-to-default jumper can be used to turn off the watchdog (sets bytes 7-10 to 0). Power up the U3 with a short from FIO6 to SPC (FIO2 to SCL on U3 1.20/1.21), then remove the jumper and power cycle the device again. This also affects the parameters in the ConfigU3 function.

The watchdog settings (bytes 7-10) are stored in non-volatile flash memory, so every call to this function where settings are written causes a flash erase/write. The flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop the flash could be damaged.

Note: Do not call this function while streaming.

Table 5.2.14-1. Watchdog Command Response

Command:    
Byte    
0 Checksum8  
1 0xF8  
2 0×05  
3 0×09  
4 Checksum16 (LSB)  
5 Checksum16 (MSB)  
6 WriteMask  
    Bit 0: Write
7 WatchdogOptions  
    Bit 5: Reset on Timeout
    Bit 4: Set DIO State on Timeout
8-9 TimeoutPeriod  
10 DIOConfig  
    Bit 7: State
    Bit 0-4: DIO#
11 Reserved  
12 Reserved  
13 Reserved  
14 Reserved  
15 Reserved  
     
Response:    
Byte    
0 Checksum8  
1 0xF8  
2 0×05  
3 0×09  
4 Checksum16 (LSB)  
5 Checksum16 (MSB)  
6 Errorcode  
7 WatchdogOptions  
8-9 TimeoutPeriod  
10 DIOConfig  
11 Reserved  
12 Reserved  
13 Reserved  
14 Reserved  
15 Reserved  
  • WatchdogOptions: The watchdog is enabled when this byte is nonzero. Set the appropriate bits to reset the device and/or update the state of 1 digital output.
  • TimeoutPeriod: The watchdog timer is reset to zero on any incoming USB communication. Note that most functions consist of a write and read, but StreamData is outgoing only and does not reset the watchdog. If the watchdog timer is not reset before it counts up to TimeoutPeriod, the actions specified by WatchdogOptions will occur. The watchdog timer has a clock rate of about 1 Hz, so a TimeoutPeriod range of 3-65535 corresponds to about 3 to 65535 seconds.
  • DIOConfig: Determines which digital I/O is affected by the watchdog, and the state it is set to. The specified DIO must have previously been configured for output. DIO# is a value from 0-19 according to the following: 0-7 => FIO0-FIO7, 8-15 => EIO0-EIO7, 16-19 => CIO0-CIO3

5 comments

I had read elsewhere on this site that from firmware 1.22 that setting 2 digital lines was possible...is there anyway to access this functionality? The description above does not seem ready to handle the specification of two digital lines.

also...is there anyway to have the watchdog do a reset where the watchdog is disabled by the reset?

The U3 watchdog only controls 1 DIO.  Perhaps you saw something about the UE9 as that controls 2 DIO.  One common solution is to use "Config Defaults" in LJControlPanel to set the reset defaults of the device, and then use the watchog to reset the device.  On the new T7 the watchdog can control all DIO.

This is the source of the confusion...this was posted in january of 2011 by labjack support admin

 

OK, got to the bottom of this. The depreciated watchdog command is being called by the driver and not interpreted properly by the U3. The problem is that the depreciated command uses bit 4 of the settings byte to enable the DIO response where the other command uses bit 3 for one DIO and bit 4 for a second DIO. The result is that the second DIO was being enable and the first was being filled in. So, not only was EIO2 not changing, but FIO0 may have been changing.

A new beta firmware is available that moves the controlling bit accordingly. You can get Beta 1.36 here: http://labjack.com/s...irmware/u3/beta

I am using the low level commands on a linux system and if I follow the settings above, the watchdog DIO state setting does not work. Just for kicks and laughs, I set bit 3 instead of bit 4 and lo and behold...it now works as I expected. What is going on here? Is there a new watchdog command packet that does in fact have 2 DIO pins capable of being set in a timeout? If not, then why does using bit3 instead of bit4 work??? Is the above command packet correct???

 

 

All UD, U3, U6, UE9, devices have been updated to support the extended watchdog function here: http://labjack.com/support/ue9/users-guide/53/53133-extended-watchdogconfig

If you have firmware 1.36 or later the above function should behave as documented.

I thought we had libs so that nobody had to worry about these things anymore. I will get someone familiar with Linux to chime in.

 

LabJackPython has a Watchdog function but it looks like its not the extended one, otherwise there are no Linux libs providing a high-level Watchdog function. Take a look at the extended-watchdog link we provided for the low-level command/response to use to set multiple digital I/O.