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2.9.1.6 - Firmware Counter Input With Debounce (Mode 6)

Intended for frequencies less than 10 Hz, this mode adds a debounce feature to the firmware counter, which is particularly useful for signals from mechanical switches.  On every applicable edge seen by the external pin, this mode increments a 32-bit register.  Unlike the pure hardware counters, these timer counters require that the firmware jump to an interrupt service routine on each edge.

The debounce period is set by writing the timer value.  The low byte of the timer value is a number from 0-255 that specifies a debounce period in 16 ms increments (plus an extra 0-16 ms of variability):

Debounce Period = (0-16 ms) + (TimerValue * 16 ms)

In the high byte (bits 8-16) of the timer value, bit 0 determines whether negative edges (bit 0 clear) or positive edges (bit 0 set) are counted.

Assume this mode is enabled with a value of 1, meaning that the debounce period is 16-32 ms and negative edges will be counted.  When the input detects a negative edge, it increments the count by 1, and then waits 16-32 ms before re-arming the edge detector.  Any negative edges within the debounce period are ignored.  This is good behavior for a normally-high signal where the switch closure causes a brief low signal (see Section 2.8.1.3).  The debounce period can be set long enough so that bouncing on both the switch closure and switch open is ignored.

Writing a value of zero to the timer performs a reset.  After reset, a read of the timer value will return zero until a new edge is detected.  If a timer is reset and read in the same function call, the read returns the value just before the reset.

 

Edge Rate Limits

This edge-detecting timer mode requires processing resources as an interrupt is required to handle each edge.  See more about edge rate limits in Section 2.9.2.

 

2 comments

Ive been a LabJack fan for several years.( mostly use UE9s + DaqFactory)..great products!

However I was totally stumped today when i tried to perform the following on a UE3:

1.  Set clock to 1Mhz with divisor

2. Set divisor to 49, to generate about 80 hz from Timer 0 which was configured as an 8 bit PWM ...so far so good.

3. Configured Timer1 for Firmware counter with Debounce. Needed falling edge trigger and it just does not want to work. I cant seem to write a value >255 to the timer ( So how does one  write the High Byte to the timer?) I tried it with LJControl Panel and that too limits the value to 255  According to the manual, the LSB of the high byte sets the trigger edge ( rising or falling)   An example will be most helpful.

4. I tried using the DAC...and of course it was entirely unusable, as it was basically a PWM signal at about 1Hz...!!  Is there a way to get an 80 hz PWM out, and use the DAC at same time?  I read the manual again and understand why this happens. 

 

Thanks

Arjun

 

 

3.  The fact that LJCP does not let you put in a value > 255 looks like a mistake that we need to fix in the test panel and config defaults section.  Where else do you see the problem and do you get an error or what happens?  I tried the LabVIEW example "U3 Firmware Counter with Debounce.vi", which adds 256 to the Value if you specify "Rising Edges" and it seems to work fine.

4.  Three ideas:  A.  Use 16-bit PWM so you can use a faster clock and still get 80 Hz PWM, B. Use the config defaults screen in LJCP to set the DAC to 8-bit mode, C.  Add a filter as mentioned in Section 2.7.