« Close

Datasheets and User Guides

App Notes

Software & Driver

 

13.1.4 Pulse Out

Capable DIO: DIO0, DIO2, DIO3, DIO4, DIO5 (aka FIO0, FIO2, FIO3, FIO4, FIO5)

Requires Clock Source: Yes

Index: 2


Pulse output will generate a specified number of pulses. The high time and the low time are specified relative to the clock source the same way as PWM with Phase Control.

Clock#Frequency = CoreFrequency / DIO_EF_CLOCK#_DIVISOR    // typically 80M/Divisor
PulseOutFrequency = Clock#Frequency / DIO_EF_CLOCK#_ROLL_VALUE
DutyCycle% = 100 * (DIO#_EF_CONFIG_A - DIO#_EF_CONFIG_B) / DIO_EF_CLOCK#_ROLL_VALUE    // if A > B

For the common case of CoreFrequency = 80 MHz and Config-B fixed at 0, we can rewrite these as:

PulseOutFrequency = 80M / (DIO_EF_CLOCK#_DIVISOR * DIO_EF_CLOCK#_ROLL_VALUE)
DutyCycle% = 100 * DIO#_EF_CONFIG_A / DIO_EF_CLOCK#_ROLL_VALUE

... and thus for 50% duty cycle simply set:

DIO#_EF_CONFIG_A = DIO_EF_CLOCK#_ROLL_VALUE / 2

CoreFrequency is always 80 MHz at this time, but in the future some low-power operational modes might result in different core frequencies.  The valid values for DIO_EF_CLOCK#_DIVISOR are 1, 2, 4, 8, 16, 32, 64, or 256, and a value of 0 (default) equates to a divisor of 1.  For more details about Clock#Frequency and DIO_EF_CLOCK#_DIVISOR, see the DIO-EF Clock Source section.


Configure:

DIO#:  First set the DIO line low (DIO#=0). The line must start low for proper pulse generation.
DIO#_EF_ENABLE: 0 = Disable, 1 = Enable
DIO#_EF_INDEX: 2
DIO#_EF_OPTIONS: Bits 0-2 specify which clock source to use ... 000 for Clock0, 001 for Clock1, and 010 for Clock2. All other bits reserved and should be set to 0.
DIO#_EF_CONFIG_A: When the specified clock source's count matches this value the line will transition from high to low.
DIO#_EF_CONFIG_B: When the specified clock source's count matches this value the line will transition from low to high.
DIO#_EF_CONFIG_C: The number of pulses to generate.
DIO#_EF_CONFIG_D: Not used.


Update:
DIO#_EF_CONFIG_A: Sets a new high to low transition point. Will take effect when writing Config_C.
DIO#_EF_CONFIG_B: Sets a new low to high transition point. Will take effect when writing Config_C.
DIO#_EF_CONFIG_C: Writing to this value will start a new pulse sequence. If a sequence is already in progress it will be aborted. Numbers previously written to Config_A or Config_B will take effect when Config_C is written.


Read:
DIO#_EF_READ_A: The number of pulses that have been completed.
DIO#_EF_READ_B: The target number of pulses.

Stream Read:
All operations discussed in this section are supported in command-response mode.  In stream mode, you can read from the integer READ registers (A, B, A_AND_RESET), but as mentioned in the Stream Section those reads only return the lower 16 bits so you need to also use STREAM_DATA_CAPTURE_16 in the scan list to get the upper 16 bits.


Reset:
DIO#_EF_READ_A_AND_RESET: Reads number of pulses that have been completed. Then restarts the pulse sequence.


Example:
First configure a clock source to drive the pulse generator. Assuming the core frequency is 80 MHz writing the following registers will produce a 1 kHz pulse frequency.

DIO_EF_CLOCK0_DIVISOR = 8
DIO_EF_CLOCK0_ROLL_VALUE = 10000
DIO_EF_CLOCK0_ENABLE = 1

Thus Clock0Frequency = 80 MHz / 8 = 10 MHz, and PWMFrequency = 10 MHz / 10000 = 1 kHz.

Now that we have a clock to work with we can configure our pulse.

DIO0_EF_ENABLE = 0
DIO0 = 0                             // set DIO0 to output-low
DIO0_EF_INDEX = 2              // pulse out type index
DIO0_EF_CONFIG_A = 2000    // high to low count
DIO0_EF_CONFIG_B = 0         // low to high count
DIO0_EF_CONFIG_C = 5000   // number of pulses
DIO0_EF_ENABLE = 1

Thus duty cycle = 100 * (2000 - 0) / 10000 = 20%.  The LabJack will now output 5000 pulses over 5 seconds at 20% duty cycle.