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App Notes

Software & Driver

 

13.1.1 EF Clock Source

The ClockSources produce the reference frequencies used to generate output waveforms and measure input waveforms. ClockSource settings control output frequency, PWM resolution, maximum measurable period, and measurement resolution.

Clock#Frequency = CoreFrequency / DIO_EF_CLOCK#_DIVISOR    //typically 80M/Divisor


CoreFrequency is always 80 MHz at this time, but in the future some low-power operational modes might result in different core frequencies.  The valid values for DIO_EF_CLOCK#_DIVISOR are 1, 2, 4, 8, 16, 32, 64, or 256, and a value of 0 (default) equates to a divisor of 1.

There are 3 DIO EF clock sources available. Each clock source has an associated bit size and several mutual exclusions. Mutual exclusions exist because the clock sources share hardware with other features. A ClockSource is created form a hardware counter. CLOCK1 uses COUNTER_A (CIO0) and CLOCK2 uses COUNTER_B (CIO1). The 32-bit clock source (CLOCK0) is created by combining the 2 16-bit clock sources (CLOCK1 CLOCK2). The following list provides ClockSource bit sizes and mutual exclusions.

CLOCK0: 32-bit. Mutual Exclusions: CLOCK1, CLOCK2, COUNTER_A (CIO0), COUNTER_B(CIO1)
CLOCK1: 16-bit. Mutual Exclusions: CLOCK0, COUNTER_A (CIO0)
CLOCK2: 16-bit. Mutual Exclusions: CLOCK0, COUNTER_B (CIO1)


The clock source is not a DIO EF feature, but the four basic operations of Configure, Read, Update, and Reset still apply:

Configure:
There are four registers associated with the configuration of clock sources:
DIO_EF_CLOCK#_ENABLE: 1 = Enable, 0 = Disable. Must be disabled to change the configuration.
DIO_EF_CLOCK#_DIVISOR: 1, 2, 4, 8, 16, 32, 64, or 256.  Default value of 0 equates to a divisor of 1.
DIO_EF_CLOCK#_OPTIONS: Reserved for future use. Write 0.
DIO_EF_CLOCK#_ROLL_VALUE: The ClockSource will count to VALUE-1 then roll to zero and repeat.  This is a 32-bit value (0-4294967295) if using a 32-bit clock, and a 16-bit value (0-65535) if using a 16-bit clock.  0 results in the max roll value possible.

A ClockSource can be enabled after DIO EF_INDEX has been configured. This allows several DIO EFs to be started at the same time.

Read:
DIO_EF_CLOCK#_COUNT: Returns the current value of a clock source's counter. This can useful for generating timestamps.

Update:
A smooth update feature has been added in firmware 1.0035. Both the roll_value and the divisor can be written while a clock source is running. As long as the clock source's period is greater than 50 µs the clock will seamlessly switch to the new settings.

Reset:
At this time there are no reset operations available for the DIO EF clock sources.

Example:
Configure CLOCK0 as a 10 MHz clock source with a roll-value of 1000000.

DIO_EF_CLOCK0_ENABLE = 0
DIO_EF_CLOCK0_DIVISOR = 8
DIO_EF_CLOCK0_ROLL_VALUE = 1000000
DIO_EF_CLOCK0_ENABLE = 1

With this clock configuration, PWM output (index=0) will have a frequency of 10 Hz.  A frequency input measurement (index=3/4) will be able to count from 0-999999 with each count equal to 0.1 microseconds, and thus a max period of about 0.1 seconds.

Advanced:
If CLOCK0 is enabled and CLOCK1 and CLOCK2 are disabled, you can still select CLOCK1 or CLOCK2 as the source for a DIO EF channel. CLOCK1 CLOCK2 are actually the LSW & MSW of CLOCK0. The frequency of CLOCK1 is the same as CLOCK0. If DIO_EF_CLOCK0_ROLL_VALUE is >= 2^16, then the frequency of CLOCK2 is CLOCK0_freq divided by the modulus (remainder portion) of CLOCK0_freq / 2^16. If (CLOCK0_ROLL_VALUE - 1) is < 2^16, then the frequency of CLOCK2 is 0.  CLOCK1_ROLL_VALUE is the modulus of (CLOCK0_ROLL_VALUE - 1) / 2^16 and CLOCK2_ROLL_VALUE is the quotient (integer portion) of (CLOCK0_ROLL_VALUE - 1) / 2^16.

Register Listing

Digital EF Clock Source
Name Start Address Type Access
DIO_EF_CLOCK0_ENABLE 44900 UINT16 R/W
DIO_EF_CLOCK0_DIVISOR 44901 UINT16 R/W
DIO_EF_CLOCK0_OPTIONS 44902 UINT32 R/W
DIO_EF_CLOCK0_ROLL_VALUE 44904 UINT32 R/W
DIO_EF_CLOCK0_COUNT 44908 UINT32 R
DIO_EF_CLOCK0_ENABLE
- Address: 44900
1 = enabled. 0 = disabled. Must be disabled during configuration.
  • Data type: UINT16  (type index = 0)
  • Readable and writable
  • Minimum firmware version: 0.8700
DIO_EF_CLOCK0_DIVISOR
- Address: 44901
Divides the core clock. Valid options: 1,2,4,8,16,32,64,256.
  • Data type: UINT16  (type index = 0)
  • Readable and writable
  • Minimum firmware version: 0.9320
DIO_EF_CLOCK0_OPTIONS
- Address: 44902
Bitmask: bit0: 1 = use external clock. All other bits reserved.
  • Data type: UINT32  (type index = 1)
  • Readable and writable
  • Minimum firmware version: 0.8700
DIO_EF_CLOCK0_ROLL_VALUE
- Address: 44904
The number of clock pulses to count before starting over at zero. The clock pulses counted are those after the divisor.
  • Data type: UINT32  (type index = 1)
  • Readable and writable
  • Minimum firmware version: 0.8700
DIO_EF_CLOCK0_COUNT
- Address: 44908
Current tick count of this clock. Will read between 0 and ROLL_VALUE-1.
  • Data type: UINT32  (type index = 1)
  • Read-only
  • Minimum firmware version: 0.9430

 

 

3 comments

I was having trouble getting CLOCK0 to behave correctly.  I disabled CLOCK0, set divisor to 8, set rollover to 20,000,000, and then enabled.  It seems to count backwards and seems to stay < 12,000ish.  I get the same behavior if I do this with Kipling.  I finally got it to work, but I had to enable CLOCK0, then set the divisor to 8 and the rollover to 20,000,000.  Now it counts up  and is in the right rollover range.  Is this a bug?

There was a bug related to 32-bit clock sources that was fixed in firmware 1.0137. The bug would cause roll values greater than 65535 to have their upper 16-bits zero'd out. That can create confusing roll values. It was possible to load a 32-bit value using an update (change a clock source while it was already running.) Sounds like a pretty good match for what you describe.

I'm on the latest version of firmware.  Is it still a bug, or is it not appropriate to disable CLOCK0 before setting the divisor and roll-value?