13.2.1 EF Clock Source [T-Series Datasheet] | LabJack
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13.2.1 EF Clock Source [T-Series Datasheet]


The clock source settings produce the reference frequencies used to generate output waveforms and measure input waveforms. They control output frequency, PWM resolution, maximum measurable period, and measurement resolution.

Clock#Frequency = CoreFrequency / DIO_EF_CLOCK#_DIVISOR    // typically 80M/Divisor

CoreFrequency is always 80 MHz at this time, but in the future some low-power operational modes might result in different core frequencies.  The valid values for DIO_EF_CLOCK#_DIVISOR are 1, 2, 4, 8, 16, 32, 64, or 256, and a value of 0 (default) equates to a divisor of 1.

There are 3 DIO-EF clock sources available. Each clock source has an associated bit size and several mutual exclusions. Mutual exclusions exist because the clock sources share hardware with other features. A clock source is created from a hardware counter. CLOCK1 uses COUNTER_A (CIO0) and CLOCK2 uses COUNTER_B (CIO1). The 32-bit clock source (CLOCK0) is created by combining the 2 16-bit clock sources (CLOCK1 CLOCK2). The following list provides clock source bit sizes and mutual exclusions:

  • CLOCK0: 32-bit. Mutual Exclusions: CLOCK1, CLOCK2, COUNTER_A (CIO0), COUNTER_B(CIO1)
  • CLOCK1: 16-bit. Mutual Exclusions: CLOCK0, COUNTER_A (CIO0)
  • CLOCK2: 16-bit. Mutual Exclusions: CLOCK0, COUNTER_B (CIO1)

The clock source is not a DIO-EF feature, but the four basic operations of Configure, Read, Update, and Reset still apply.


There are four registers associated with the configuration of clock sources:

Digital EF Clock Source
Name Start Address Type Access

DIO_EF_CLOCK0_ENABLE             1 = enabled. 0 = disabled. Must be disabled during configuration.

44900 UINT16 R/W

DIO_EF_CLOCK0_DIVISOR             Divides the core clock. Valid options: 1,2,4,8,16,32,64,256.

44901 UINT16 R/W

DIO_EF_CLOCK0_OPTIONS             Bitmask: bit0: 1 = use external clock. All other bits reserved.

44902 UINT32 R/W

DIO_EF_CLOCK0_ROLL_VALUE             The clock will count to this value and then start over at zero. The clock pulses counted are those after the divisor. 0 results in the max roll value possible. This is a 32-bit value (0-4294967295) if using a 32-bit clock, and a 16-bit value (0-65535) if using a 16-bit clock.

44904 UINT32 R/W

A clock source can be enabled after DIO#_EF_INDEX has been configured. This allows several DIO-EFs to be started at the same time.

DIO_EF_CLOCK0_ROLL_VALUE is a 32-bit value (0-4294967295) if using a 32-bit clock, and a 16-bit value (0-65535) if using a 16-bit clock. 0 results in the max roll value possible.


To read the clock, read DIO_EF_CLOCK0_COUNT:

Digital EF Clock Source
Name Start Address Type Access

DIO_EF_CLOCK0_COUNT             Current tick count of this clock. Will read between 0 and ROLL_VALUE-1.

44908 UINT32 R

This can be useful for generating timestamps.


Both the ROLL_VALUE and the DIVISOR can be written while a clock source is running. As long as the clock source's period is greater than 50 µs, the clock will seamlessly switch to the new settings.


At this time there are no reset operations available for the DIO-EF clock sources.


Configure CLOCK0 as a 10 MHz clock source with a roll value of 1000000.


With this clock configuration, PWM output (index=0) will have a frequency of 10 Hz.  A frequency input measurement (index=3/4) will be able to count from 0-999999 with each count equal to 0.1 microseconds, and thus a max period of about 0.1 seconds.