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13.0 Digital I/O [T-Series Datasheet]

Digital I/O Overview

Basics: An digital I/O is an digital input or output. DIO is a generic name used for all digital I/O.

Common Uses: For wiring information on open-collector signals, driven signals, controlling relays, and mechanical switches, see the Digital I/O (App Note).

How to read and write DIO: See 3.0 Communication for communication basics. Also, LabJack Kipling's Dashboard tab shows live DIO values.

On this page

DIO Extended Features: T-series DIO Extended Features expose more complicated features such as:

  • Timers, Counters, PWM, Quadrature Input, and more.

Digital Communication Protocols: T-series DIO lines can also be used to communicate with a large number of sensors that require the use of various digital communication protocols. The T-series devices implement the following protocols:

DIO Summary By Device


Digital I/O: Up to 16 DIO lines (DIO4-DIO19)
   • 8 flexible I/O (DIO4-DIO11)
   • 8 dedicated I/O (DIO12-DIO19)
Logic Level: 3.3V (Adjustable using a LJTick-LVDigitalIO).


Digital I/O: Up to 23 DIO lines (DIO0-DIO22)
Logic Level: 3.3V (Adjustable using a LJTick-LVDigitalIO).


There are two basic ways to use DIO:

  1. Read or write individual DIO channels one-at-a-time. Individual DIO channels are automatically configured.
  2. Read or write multiple DIO channels at once with the DIO Bitmask Registers, which are manually configured.

In addition, digital I/O registers have "DIO" names and alternate "FIO/EIO/CIO/MIO" names. See DIO vs. FIO/EIO/CIO/MIO for more details.

Individual DIO Channels

Each T-Series device exposes:

  • Some DIOs on the screw terminals.
  • Additional DIOs on a connector (either a DB15 or a DB37).



The LabJack T4 has up to 16 built-in digital input/output lines. They can be written/read as registers named DIO4-DIO19.

DIO4-DIO11 are flexible I/O lines. (See 13.1 Flexible I/O.) These are lines that can be configured for analog input or digital input/output:

Figure 13.0-1 T4 Flexible I/O
T4 Flexible I/O (DIO4-DIO11)

DIO12-DIO19 are dedicated (digital-only) I/O lines:

Figure 13.0-2 T4 Dedicated Digital I/O
T4 Dedicated Digital I/O (DIO12-DIO19)

The registers DIO4-DIO19 can also be accessed using their alternate register names, FIO4-7, EIO0-7, and CIO0-3:

Table 13.0-1. T4 DIO Mapping

  AIN (0-3) FIO (4-7) EIO (0-7) CIO (0-3)
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3
DIO Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
Available Digital I/O        
Available Analog I/O                

T4 DIO Channel Registers
Name Start Address Type Access
DIO#(4:19) 2004 UINT16 R/W    


    Figure 13.0-3 T7 Digital I/O
    T4 Flexible I/O (DIO4-DIO11)

    The LabJack T7 has 23 built-in digital input/output lines. They can be written/read as registers named DIO0-DIO22. They can also accessed using their alternate register names: FIO0-7, EIO0-7, CIO0-3, and MIO0-2:

    Table 13.0-2. T7 DIO Mapping

      FIO (0-7) EIO (0-7) CIO (0-3) MIO (0-2)
    0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 0 1 2
    DIO Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
    Available Digital I/O

    T7 DIO Channel Registers
    Name Start Address Type Access
    DIO#(0:22) 2000 UINT16 R/W    


      1. To set DIO4 to a digital input and determine if the channel is high or low, read register DIO4. The result will either 1 or 0.
      2. To set DIO4 to a digital output and set it high or low, write either 1 or 0 to DIO4.

      DIO Bitmask Registers

      The digital I/O bitmask registers allow for the direction (input or output) and state (high or low) of multiple digital I/O lines to be set during a single communication packet. Each bit in the value written to these registers corresponds to an individual I/O line on the device. The number of valid bits in the bitmask depends on which device is being used. To see which bits are valid for each device, see the above reference tables 13.0-1 T4 DIO Mapping and 13.0-2 T7 DIO Mapping.

      DIO Bitmask Registers
      Name Start Address Type Access
      DIO_INHIBIT 2900 UINT32 R/W    
      DIO_DIRECTION 2850 UINT32 R/W    
      DIO_STATE 2800 UINT32 R/W    

      T4 only:


      The lower four bits of these DIO bitmask registers don't apply to the T4.

      Writing DIO Bitmask Registers

      DIO_INHIBIT, DIO_DIRECTION, and DIO_STATE should typically be written together. Each true bit in DIO_INHIBIT prevents a corresponding bit in DIO_DIRECTION and DIO_STATE from being modified. For more details about the DIO_INHIBIT register, see the examples section below, as well as the manual configuration section of the flexible I/O page.

      The LJM multiple value functions provide an easy way to write DIO_INHIBIT, DIO_DIRECTION, and DIO_STATE in a single packet.

      Write Example:

      To configure DIO4 and DIO5 as a digital outputs set to high, do the following:

      1. Build a bitmask based on the DIO channel numbers being controlled. For this example we are controlling DIO channels 4 and 5. All of the following values are equivalent:
        (1<<4) | (1<<5) , (2^4 + 2^5) , and 16 + 32 are all equal to 0b00110000, 0x30, and 48.
      2. Subtract the bitmask value 0x30 from a value with 23 bits of "1"s (0x7FFFFF)to calculate the value that needs to be written to the DIO_INHIBIT register:
        0x7FFFFF - (1<<4)|(1<<5) which equals 0b11111111111111111001111, 0x7FFFCF, or 8388559
      3. Write the bitmask value 0x7FFFCF to the DIO_INHIBIT register to inhibit all DIO channels except 4 and 5.
      4. Write the bitmask value 0x30 to the DIO_DIRECTION register to set the I/O lines as output.
      5. Write the bitmask value 0x30 to the DIO_STATE register to have the two I/O lines output 3.3V.

      Reading DIO Bitmask Registers

      The typical workflow for reading the DIO Bitmask Registers is to only read DIO_STATE. This is because DIO_INHIBIT and DIO_DIRECTION are typically known.


      DIO is a generic name used for all digital I/O. The DIO are subdivided into different groups called FIO, EIO, CIO, and MIO.

      Sometimes these are referred to as different "ports". For example, FIO is an 8-bit port of digital I/O and EIO is a different 8-bit port of digital I/O. The different names (FIO vs. EIO vs. CIO vs. MIO) have little meaning, and generally you can call these all DIO0-DIO22 and consider them all the same. There are a couple details unique to different ports:

      • The source impedance of an FIO line is about 550 ohms, whereas the source impedance of EIO/CIO/MIO lines is about 180 ohms. Source impedance might be important when sourcing or sinking substantial currents, such as when controlling relays.
      • The MIO lines are automatically controlled when using analog input channel numbers from 16 to 127. This is for controlling external multiplexers or the Mux80 expansion board.

      Alternate Digital Channel Names

      The following shows the alternate DIO channel registers names:

        DIO Name Alternate Name  
      FIO  DIO0  FIO0  T7 only
       DIO1  FIO1  T7 only
       DIO2  FIO2  T7 only
       DIO3  FIO3  T7 only
       DIO4  FIO4  
       DIO5  FIO5  
       DIO6  FIO6  
       DIO7  FIO7  
      EIO  DIO8  EIO0  
       DIO9  EIO1  
       DIO10  EIO2  
       DIO11  EIO3  
       DIO12  EIO4  
       DIO13  EIO5  
       DIO14  EIO6  
       DIO15  EIO7  
      CIO  DIO16  CIO0  
       DIO17  CIO1  
       DIO18  CIO2  
       DIO19  CIO3  
      MIO  DIO20  MIO0  T7 only
       DIO21  MIO1  T7 only
       DIO22  MIO2  T7 only

      Digital I/O
      Name Start Address Type Access
      FIO#(0:7) 2000 UINT16 R/W    
      EIO#(0:7) 2008 UINT16 R/W    
      CIO#(0:3) 2016 UINT16 R/W    
      MIO#(0:2) 2020 UINT16 R/W    


      Writing 0 to FIO4 (address 2004) is the same as writing 0 to DIO4 (address 2004).

      FIO/EIO/CIO/MIO Bitmask Registers

      The following FIO/EIO/CIO/MIO bitmask registers are similar to the above DIO bitmask registers. However, instead of having a dedicated register designated for the inhibit bits, the inhibit bits are the upper 8-bits of each register.

      T4 only:

      • Lower order bits of the FIO_STATE and FIO_DIRECTION have no affect on the T4.
      • The MIO_STATE and MIO_DIRECTION registers have no affect on the T4.

      FIO/EIO/CIO/MIO State Bitmask Registers
      Name Start Address Type Access
      FIO_STATE 2500 UINT16 R/W    
      EIO_STATE 2501 UINT16 R/W    
      CIO_STATE 2502 UINT16 R/W    
      MIO_STATE 2503 UINT16 R/W    


      To read the digital state of all FIO lines in a bitmask, read FIO_STATE. If the result is 0b11111011, FIO2 is logic low and all other FIO lines are logic high.

      FIO/EIO/CIO/MIO Direction Bitmask Registers
      Name Start Address Type Access
      FIO_DIRECTION 2600 UINT16 R/W    
      EIO_DIRECTION 2601 UINT16 R/W    
      CIO_DIRECTION 2602 UINT16 R/W    
      MIO_DIRECTION 2603 UINT16 R/W    


      To set FIO1-7 to output, write a value of 0x01FF to FIO_DIRECTION. FIO0 is the least significant bit, so to prevent modification the corresponding inhibit bit is set with 0x01 in the most significant byte. The least significant byte is 0xFF, which is all 8 bits of FIO set to output.

      Combination FIO/EIO/CIO/MIO State Registers

      These registers are a combination of the FIO/EIO/CIO/MIO State registers.

      Combination Direction Bitmask Registers
      Name Start Address Type Access
      FIO_EIO_STATE 2580 UINT16 R/W    
      EIO_CIO_STATE 2581 UINT16 R/W    
      CIO_MIO_STATE 2582 UINT16 R/W    

      Other Considerations


      See Appendix A-2 for specs including:

      • Low Level Input Voltage
      • High Level Input Voltage
      • Hysteresis Voltage
      • Maximum Input Voltage
      • Output Low Voltage
      • Output High Voltage
      • Short Circuit Current
      • Output Impedance

      Streaming DIO

      For details about which DIO registers can be streamed look at section 3.2 Stream Mode. In short, only the FIO/EIO/CIO/MIO State registers can be streamed because stream data is transferred as 16-bit values.

      Electrical Overview

      All digital I/O on T-series devices have 3 possible states: input, output-high, or output-low. Each bit of I/O can be configured individually:

      • When configured as an input, a bit has a ~100 kΩ pull-up resistor to 3.3 volts (all digital I/O are at least 5 volt tolerant).
      • When configured as output-high, a bit is connected to the internal 3.3 volt supply (through a series resistor).
      • When configured as output-low, a bit is connected to GND (through a series resistor).

      If a DIO terminal is at about 3.3 volts, and you are not sure if it is set to input or output-high, a couple ways to tell are:

      1. Look for a slight change on a terminal with nothing connected except a DMM. For example, a DMM measurement of an input might show 3.30V whereas that same terminal as output-high reads 3.31V.
      2. Add a load resistor. If you add a 100k from FIO7 to GND, the terminal should measure about 1.6V for input and 3.3V for output-high.

      See Appendix A-2 for more details.

      By default, the DIO lines are digital I/O, but they can also be configured as PWM Output, Quadrature Input, Counters, etc. (See 13.2 DIO Extended Feature.)

      Power-up Defaults

      The default condition of the digital I/O can be configured using Kipling. From the factory, all digital I/O are configured as inputs by default. Note that even if the default for a line is changed to output-high or output-low, there could be a small time (milliseconds) during boot-up where all digital I/O are in the factory default condition. For more information see this forum topic.


      All the digital I/O include an internal series resistor that provides overvoltage/short-circuit protection. These series resistors also limit the ability of these lines to sink or source current. Refer to Appendix A-2.

      The fact that the digital I/O are specified as 5-volt tolerant means that 5 volts can be connected to a digital input without problems (see the actual limits in the specifications in Appendix A).

      Increase logic level to 5V

      On-board DACs: The DAC0 and DAC1 channels can be set to 5 volts, providing 2 output lines with such capability.

      LabJack LJTick-DigitalOut5V: We sell the LJTick-DigitalOut5V that converts our 3.3V outputs to 5V outputs.

      Logic Buffer IC: The surefire way to get 5 volts from a digital output is to add a simple logic buffer IC that is powered by 5 volts and recognizes 3.3 volts as a high input. Consider the CD74ACT541E from TI (or the inverting CD74ACT540E). All that is needed is a few wires to bring VS, GND, and the signal from the LabJack to the chip. This chip can level shift up to eight 0/3.3 volt signals to 0/5 volt signals and provides high output drive current (+/-24 mA).

      Open-collector: In some cases, an open-collector style output can be used to get a 5V signal. To get a low set the line to output-low, and to get a high set the line to input. When the line is set to input, the voltage on the line is determined by a pull-up resistor. T-series devices have an internal ~100k resistor to 3.3V, but an external resistor can be added to a different voltage. Whether this will work depends on how much current the load is going to draw and what the required logic thresholds are. Say for example a 10k resistor is added from EIO0 to VS. EIO0 has an internal 100k pull-up to 3.3 volts and a series output resistance of about 180 ohms. Assume the load draws just a few microamps or less and thus is negligible. When EIO0 is set to input, there will be 100k to 3.3 volts in parallel with 10k to 5 volts, and thus the line will sit at about 4.85 volts. When the line is set to output-low, there will be 180 ohms in series with the 10k, so the line will be pulled down to about 0.1 volts.