Comm functions Overview
These are functions which are handled by the Comm processor only, and thus the packet destination bit is 0 for local. All functions can be transferred by USB, Ethernet TCP, or Ethernet UDP.
The majority of Windows users will use the high-level UD driver rather than these low-level functions.
Following is a description of the general UE9 low-level communication protocol. There are two types of commands:
Normal: 1 command word plus 0-7 data words.
Extended: 3 command words plus 0-125 data words.
Normal commands have a smaller packet size and can be faster in some situations. Extended commands provide more commands, better error detection, and a larger maximum data payload.
Table 5.1-1. Normal command format
Byte | |||
0 | Checksum8: Includes bytes 1-15 | ||
1 | Command Byte: DCCCCWWW | ||
Bit 7: Destination Bit: | |||
0 = Local, | |||
1 = Remote. | |||
Bits 6-3: Normal command number (0-14). | |||
Bits 2-0: Number of data words. | |||
2-15 | Data words. |
Table 5.1-2. Extended command format:
Byte | |||
0 | Checksum8: Includes bytes 1-5 | ||
1 | Command Byte: D1111WWW | ||
Bit 7: Destination Bit: | |||
0 = Local, | |||
1 = Remote. | |||
Bits 6-3: 1111 specifies that this is an extended command | |||
Bits 2-0: Used with some commands. | |||
2 | Number of data words. | ||
3 | Extended command number. | ||
4 | Checksum16 (LSB) | ||
5 | Checksum16 (MSB) | ||
6-255 | Data words. |
Checksum calculations:
All checksums are a “1’s complement checksum”. Both the 8-bit and 16-bit checksum are unsigned. Sum all applicable bytes in an accumulator, 1 at a time. Each time another byte is added, check for overflow (carry bit), and if true add one to the accumulator.
In a high-level language, do the following for the 8-bit normal command checksum:
In a high-level language, do the following for an extended command 16-bit checksum:
Then do the following for the 8-bit extended checksum:
Destination bit:
This bit specifies whether the command is destined for the local or remote target. Generally, local means the packet should be handled by the Comm processor, while remote means the Comm processor should pass the packet on.
Multi-byte parameters:
In the following function definitions there are various multi-byte parameters. The least significant byte of the parameter will always be found at the lowest byte number. For instance, bytes 10 through 13 of CommConfig are the IP address which is 4 bytes long. Byte 10 is the least significant byte (LSB), and byte 13 is the most significant byte (MSB).
Masks:
Some functions have mask parameters. The WriteMask found in some functions specifies which parameters are to be written. In the following documentation, parameters affected by the WriteMask have a [#] next to their name which specifies which bit in the WriteMask goes with which parameter. If a bit is 1, that parameter will be updated with the new passed value. If a bit is 0, the parameter is not changed and only a read is performed.
The AINMask found in some functions specifies which analog inputs are acquired. This is a 16-bit parameter where each bit corresponds to AIN0-AIN15. If a bit is 1, that channel will be acquired.
The digital I/O masks, such as FIOMask, specify that the passed value for direction and state are updated if a bit 1. If a bit of the mask is 0 only a read is performed on that bit of I/O.
Resolution:
All analog input functions have a Resolution parameter. This allows you to choose between speed or resolution. See Sections 3.1 and 3.2 for timing information.
SettlingTime:
Some analog input functions have a SettlingTime parameter. This parameter adds extra settling time before each sample of about SettlingTime * 5 microseconds.
Binary Encoded Parameters:
Many parameters in the following functions use specific bits within a single integer parameter to write/read specific information. In particular, most digital I/O parameters contain the information for each bit of I/O in one integer, where each bit of I/O corresponds to the same bit in the parameter (e.g. the direction of FIO0 is set in bit 0 of parameter FIODir). For instance, in the function ControlConfig, the parameter FIODir is a single byte (8 bits) that writes/reads the direction of each of the 8 FIO lines:
These are functions which are handled by the Comm processor only, and thus the packet destination bit is 0 for local. All functions can be transferred by USB, Ethernet TCP, or Ethernet UDP.
Writes and reads various configuration settings associated with the Comm processor.
If WriteMask is nonzero, some or all default values are written to flash. The Comm flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop with a nonzero WriteMask, the flash could eventually be damaged.
There is a hardware method to restore parameters to the default values described below (in parentheses). Power up the UE9 with a short from FIO2<=>SCL, then remove the jumper and power cycle the device again. This also returns Control settings to factory defaults (Sections 5.3.2 and 5.3.13).
Table 5.2.1-1. Read and write commands
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0×78 | |
2 | 0×10 | |
3 | 0×01 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | WriteMask | |
7 | Reserved | |
8 | LocalID [0] | |
9 | PowerLevel [1] | |
0×00: Normal | ||
0×01: Reserved | ||
0×02: Reserved | ||
10-13 | IPAddress [2] | |
14-17 | Gateway [3] | |
18-21 | Subnet [4] | |
22-23 | PortA [5] | |
24-25 | PortB [5] | |
26 | DHCPEnabled [6] | |
27 | 0×00 | |
28-33 | 0×00 | |
34-35 | 0×00 | |
36-37 | 0×00 | |
[#] denotes WriteMask bit number association. | ||
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0×78 | |
2 | 0×10 | |
3 | 0×01 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | WriteMask | |
7 | Reserved | |
8 | LocalID | |
9 | PowerLevel | |
10-13 | IPAddress | |
14-17 | Gateway | |
18-21 | Subnet | |
22-23 | PortA | |
24-25 | PortB | |
26 | DHCPEnabled | |
27 | ProductID | |
28-33 | MACAddress | |
34-35 | HWVersion | |
36-37 | CommFWVersion |
Resets the pointers to the stream buffer to make it empty. Often called before a stream, after a stream, or both.
Table 5.2.2-1. FlushBuffer Command/response
Command: | |
Byte | |
0 | 0x08 |
1 | 0x08 |
Response: | |
Byte | |
0 | 0x08 |
1 | 0x08 |
This is a special function only used over Ethernet UDP. Send the 6-byte command below to port 52362, using the broadcast IP of 255.255.255.255. The command will try to go to every device on the subnet, and every Ethernet LabJack should send back the specified 38 byte response.
The response is similar to the response from the CommConfig function. See Section 5.2.1 for additional documentation.
DiscoveryUDP and the standard Ping function are useful for finding Ethernet connected UE9s and testing basic communication.
Table 5.2.3-1.
Command: | |
Byte | |
0 | 0×22 |
1 | 0×78 |
2 | 0×00 |
3 | 0xA9 |
4 | 0×00 |
5 | 0×00 |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0×78 |
2 | 0×10 |
3 | 0xA9 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0×00 |
7 | 0×00 |
8 | LocalID |
9 | PowerLevel |
10-13 | IPAddress |
14-17 | Gateway |
18-21 | Subnet |
22-23 | PortA |
24-25 | PortB |
26 | DHCPConfig |
27 | ProductID |
28-33 | MACAddress |
34-35 | HWVersion |
36-37 | CommFWVersion |
Sets a list of up to five IP addresses that are the only IP addresses that can connect to the UE9. Any unused Addresses can be set to 0xFFFFFFFF (255.255.255.255). If IP #0 is set to 0xFFFFFFFF than the feature is disabled and any IP address can connect.
Table 5.2.4-1.
Command: | |
Byte | |
0 | Checksum8 |
1 | 0×78 |
2 | 0×0B |
3 | 0xAF |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Write |
7 | Reserved |
8-11 | IP #0 |
12-15 | IP #1 |
16-19 | IP #2 |
20-23 | IP #3 |
24-27 | IP #4 |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0×78 |
2 | 0×0B |
3 | 0xAF |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Write |
7 | ErrorCode |
8-11 | IP #0 |
12-15 | IP #1 |
16-19 | IP #2 |
20-23 | IP #3 |
24-27 | IP #4 |
These are functions that are handled by the Control processor, and thus the packet destination bit is 1 for remote. Most functions can be transferred by USB, Ethernet TCP, or Ethernet UDP. The exception is stream commands which are not supported over UDP.
Response: | |
Byte | |
0 | 0xB8 |
1 | 0xB8 |
Configures various parameters associated with the Control processor. Although this function appears to have many of the same digital I/O and DAC parameters as other functions, most parameters in this case are affecting the power-up values, not the current values.
If WriteMask is nonzero, some or all default values are written to flash. The Control flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop with a nonzero WriteMask, the flash could be damaged.
There is a hardware method to restore parameters to the default values described below (in parentheses). Power up the UE9 with a short from FIO2<=>SCL, then remove the jumper and power cycle the device again. This also returns Comm (Section 5.2.1) and Watchdog (Section 5.3.13) settings to factory defaults.
Note: If the stream is running, you cannot update any of the values (WriteMask must equal 0).
Table 5.3.2-1. ControlConfig Command/Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×06 | |
3 | 0×08 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | WriteMask | |
Bit 2: Update DAC defaults | ||
Bit 1: Update digital defaults | ||
Bit 0: Update power level default | ||
7 | PowerLevel [0] | |
0×00: Fixed high, system clock = 48 MHZ | ||
0×01: Fixed low, system clock = 6 MHz | ||
8 | FIODir | |
9 | FIOState | |
10 | EIODir | |
11 | EIOState | |
12 | CIODirState | |
Bits 7-4: Direction | ||
Bits 3-0: State | ||
13 | MIODirState | |
Bit 7: Do not load digital I/O defaults | ||
Bits 6-4: Direction | ||
Bits 2-0: State | ||
14 | DAC0 (LSB) | |
15 | DAC0 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bits of output | ||
16 | DAC1 (LSB) | |
17 | DAC1 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bits of output | ||
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×09 | |
3 | 0×08 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | PowerLevel | |
8 | ResetSource | |
9-10 | ControlFWVersion | |
11-12 | ControlBLVersion | |
13 | HiRes Flag (Bit 0) | |
14 | FIODir | |
15 | FIOState | |
16 | EIODir | |
17 | EIOState | |
18 | CIODirState | |
Bits 7-4: Direction | ||
Bits 3-0: State | ||
19 | MIODirState | |
Bits 6-4: Direction | ||
Bits 2-0: State | ||
20 | DAC0 (LSB) | |
21 | DAC0 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bits of output | ||
22 | DAC1 (LSB) | |
23 | DAC1 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bits of output |
A very useful function that writes/reads almost every I/O on the LabJack UE9.
Note: Feedback command should not be called while streaming. FeedbackAlt with no analog inputs is allowed.
Table 5.3.3-1. Feedback Command Response
Feedback Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×0E | |
3 | 0×00 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | FIOMask | |
7 | FIODir | |
8 | FIOState | |
9 | EIOMask | |
10 | EIODir | |
11 | EIOState | |
12 | CIOMask | |
13 | CIODirState | |
Bits 7-4: Direction | ||
Bits 3-0: State | ||
14 | MIOMask | |
15 | MIODirState | |
Bits 6-4: Direction | ||
Bits 2-0: State | ||
16 | DAC0 (LSB) | |
17 | DAC0 | |
Bit 7: Enabled | ||
Bit 6: Update | ||
Bits 3-0: Upper 4 bits output | ||
18 | DAC1 (LSB) | |
19 | DAC1 | |
Bit 7: Enabled | ||
Bit 6: Update | ||
Bits 3-0: Upper 4 bits output | ||
20-21 | AINMask | |
22 | AIN14ChannelNumber | |
23 | AIN15ChannelNumber | |
24 | Resolution | |
25 | SettlingTime | |
26 | AIN1_0_BipGain | |
27 | AIN3_2_BipGain | |
28 | AIN5_4_BipGain | |
29 | AIN7_6_BipGain | |
30 | AIN9_8_BipGain | |
31 | AIN11_10_BipGain | |
32 | AIN13_12_BipGain | |
33 | AIN15_14_BipGain | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×1D | |
3 | 0×00 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | FIODir | |
7 | FIOState | |
8 | EIODir | |
9 | EIOState | |
10 | CIODirState | |
11 | MIODirState | |
12-13 | AIN0 | |
14-15 | AIN1 | |
16-17 | AIN2 | |
18-19 | AIN3 | |
20-21 | AIN4 | |
22-23 | AIN5 | |
24-25 | AIN6 | |
26-27 | AIN7 | |
28-29 | AIN8 | |
30-31 | AIN9 | |
32-33 | AIN10 | |
34-35 | AIN11 | |
36-37 | AIN12 | |
38-39 | AIN13 | |
40-41 | AIN14 | |
42-43 | AIN15 | |
44-47 | Counter0 | |
48-51 | Counter1 | |
52-55 | Timer0 | |
56-59 | Timer1 | |
60-63 | Timer2 |
Table 5.3.3-2. Nibble values for various gains
Gain | Unipolar | Bipolar |
*1 | 0×00 | 0×08 |
*2 | 0×01 | NA |
*4 | 0×02 | NA |
*8 | 0×03 | NA |
The LabJackUD driver for Windows uses a modified version of the Feedback function called FeedbackAlt. This modified function has additional parameters added to specify channel numbers for all 16 analog input reads, making it useful when using extended channels or more than 2 internal channels.
The command for FeedbackAlt is the same as Feedback, except that AINxChannelNumber parameters are added for channels 0-13 (new bytes 34-47). The command number (byte 3) changes to 0x01 and the number of data words (byte 2) changes to 0x15.
The response for FeedbackAlt is the same as Feedback, except that the counter/timer reads are removed, and thus the response is 44 bytes long. The command number (byte 3) changes to 0x01 and the number of data words (byte 2) changes to 0x13.
The order of execution in hardware for either function is:
An alternative to Feedback, is this function which writes or reads a single output or input.
Note: Do not use SingleIO with the AIN IOType while streaming.
Table 5.3.4-1. SingleIO Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xA3 |
2 | IOType |
3 | Channel |
4 | Dir/BipGain/DACL |
5 | State/Resolution/DACH |
6 | SettlingTime |
7 | Reserved |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xA3 |
2 | IOType |
3 | Channel |
4 | Dir/AINL |
5 | State/AINM |
6 | AINH |
7 | Reserved |
Table 5.3.4-2. IOType
IOType | |
0 | Digital Bit Read |
1 | Digital Bit Write |
2 | Digital Port Read |
3 | Digital Port Write |
4 | Analog In |
5 | Analog Out |
Table 5.3.4-3. Channel of IOType
Digital Port Channel | |
0 | FIO |
1 | EIO |
2 | CIO |
3 | MIO |
Enables, configures, and reads the counters and timers.
Table 5.3.5-1. TimerCounter Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×0C | |
3 | 0×18 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | TimerClockDivisor (0 = ÷256) | |
7 | EnableMask | |
Bit 7: UpdateConfig | ||
Bit 4: Enable Counter1 | ||
Bit 3: Enable Counter0 | ||
Bits 2-0: Number of timers enabled | ||
8 | TimerClockBase | |
0×00: 750 kHz | ||
0×01: System Clock | ||
0×02: Reserved | ||
0×03: Reserved | ||
0×03: Reserved | ||
9 | UpdateReset | |
Bit 7: Reset Counter1 | ||
Bit 6: Reset Counter0 | ||
Bit 5: UpdateReset Timer5 | ||
Bit 4: UpdateReset Timer4 | ||
Bit 3: UpdateReset Timer3 | ||
Bit 2: UpdateReset Timer2 | ||
Bit 1: UpdateReset Timer1 | ||
Bit 0: UpdateReset Timer0 | ||
10 | Timer0Mode | |
11-12 | Timer0Value | |
13 | Timer1Mode | |
14-15 | Timer1Value | |
16 | Timer2Mode | |
17-18 | Timer2Value | |
19 | Timer3Mode | |
20-21 | Timer3Value | |
22 | Timer4Mode | |
23-24 | Timer4Value | |
25 | Timer5Mode | |
26-27 | Timer5Value | |
28 | Counter0Mode | |
29 | Counter1Mode | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×11 | |
3 | 0×18 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | EnableStatus | |
8-11 | Timer0 | |
12-15 | Timer1 | |
16-19 | Timer2 | |
20-23 | Timer3 | |
24-27 | Timer4 | |
28-31 | Timer5 | |
32-35 | Counter0 | |
36-39 | Counter1 |
Table 5.3.5-2. Timer Modes
Timer Modes | |
0 | 16-bit PWM output |
1 | 8-bit PWM output |
2 | Period input (32-bit, rising edges) |
3 | Period input (32-bit, falling edges) |
4 | Duty cycle input |
5 | Firmware counter input |
6 | Firmware counter input (with debounce) |
7 | Frequency output |
8 | Quadrature input |
9 | Timer stop input (odd timers only) |
10 | System timer low read |
11 | System timer high read |
12 | Period input (16-bit, rising edges) |
13 | Period input (16-bit, falling edges) |
Not supported over UDP. Stream mode operates on a table of channels that are scanned at the specified scan rate. Before starting a stream, you need to call this function to configure the table and scan clock.
Table 5.3.6-1. StreamConfig Command Response
Command: | |||||
Byte | |||||
0 | Checksum8 | ||||
1 | 0xF8 | ||||
2 | NumChannels + 3 | ||||
3 | 0×11 | ||||
4 | Checksum16 (LSB) | ||||
5 | Checksum16 (MSB) | ||||
6 | NumChannels | ||||
7 | Resolution | ||||
8 | SettlingTime | ||||
9 | ScanConfig | ||||
Bit 7: Enable scan pulse output. | |||||
Bit 6: Enable external scan trigger. | Minimum | Minimum W/ | |||
Bits 4-3: Internal stream clock frequency. | Scan Freq | Divisor | |||
b00: 4 MHz | 61.1 | 0.239 | |||
b01: 48 MHz | 733 | 2.87 | |||
b10: 750 kHz | 11.5 | 0.045 | |||
b11: 24 MHz | 367 | 1.44 | |||
Bit 1: Divide Clock by 256 | |||||
10-11 | Scan Interval (1-65535) | ||||
12 | ChannelNumber | ||||
13 | ChannelOptions | ||||
Bits 3-0: BipGain | |||||
Repeat 12-13 for each Channel | |||||
Response: | |||||
Byte | |||||
0 | Checksum8 | ||||
1 | 0xF8 | ||||
2 | 0×01 | ||||
3 | 0×11 | ||||
4 | Checksum16 (LSB) | ||||
5 | Checksum16 (MSB) | ||||
6 | Errorcode | ||||
7 | 0×00 |
Table 5.3.6-2. Nibble values for various gains
Gain | Unipolar | Bipolar |
*1 | 0×00 | 0×08 |
*2 | 0×01 | NA |
*4 | 0×02 | NA |
*8 | 0×03 | NA |
Not supported over UDP. Once the stream settings are configured, this function is called to start the stream.
Table 5.3.7-1. StreamStart Command Response
Command: | |
Byte | |
0 | 0xA8 |
1 | 0xA8 |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xA9 |
2 | Errorcode |
3 | 0x00 |
Not supported over UDP. After starting the stream, the data will be sent as available in the following format. Data is sent 16 samples at a time in a 46 byte packet. Reads oldest data from buffer.
Note that USB stream data is a special case where each 46-byte data packet is padded with 2 zeros on the end (not part of the protocol), and then 4 of these 48-byte blocks are grouped together and sent in 3 transfers over the 64-byte endpoint. See the USB Section for more information.
Table 5.3.8-1. StreamData response table
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF9 |
2 | 0×14 |
3 | 0xC0 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6-9 | TimeStamp |
10 | PacketCounter |
11 | Errorcode |
12-13 | Sample0 |
14-15 | Sample1 |
16-17 | Sample2 |
18-19 | Sample3 |
20-21 | Sample4 |
22-23 | Sample5 |
24-25 | Sample6 |
26-27 | Sample7 |
28-29 | Sample8 |
30-31 | Sample9 |
32-33 | Sample10 |
34-35 | Sample11 |
36-37 | Sample12 |
38-39 | Sample13 |
40-41 | Sample14 |
42-43 | Sample15 |
44 | ControlBacklog |
45 | CommBacklog |
Not supported over UDP.
Table 5.3.9-1. StreamStop Command Response
Command: | |
Byte | |
0 | 0xB0 |
1 | 0xB0 |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xB1 |
2 | Errorcode |
3 | 0x00 |
Reads 1 block (128 bytes) from the Control non-volatile memory. The Mem area is arranged in 16 blocks of 128 bytes each. Blocks 0-7 are used by LabJack Corporation to store calibration data, and blocks 8-15 are available to the user.
Table 5.3.10-1. ReadMem Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x2A |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0x00 |
7 | BlockNum |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x41 |
3 | 0x2A |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0x00 |
7 | BlockNum |
8-135 | Data |
Writes 1 block (128 bytes) to the Control non-volatile memory. The Mem area must be erased before writing. The Mem area is arranged in 16 blocks of 128 bytes each. Blocks 0-7 are used by LabJack Corporation to store calibration data, and blocks 8-15 are available to the user.
Table 5.3.11-1. WriteMem Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x41 |
3 | 0x28 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0x00 |
7 | BlockNum |
8-135 | Data |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x28 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | 0x00 |
The UE9 uses flash memory, so you must erase it before writing. The non-volatile Mem area is arranged in 16 blocks of 128 bytes each. Blocks 0-7 are used by LabJack Corporation to store calibration data, and blocks 8-15 are available to the user. The EraseMem function erases 1 Kbyte at a time (blocks 0-7 or blocks 8-15). There is no way to erase only a smaller area.
Table 5.3.12-1. EraseMem Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0x01 | |
3 | 0x29 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | EraseArea (LSB) | |
0x00: Blocks 8-15 | ||
0x4C: Blocks 0-7 | ||
7 | EraseArea (MSB) | |
0x00: Blocks 8-15 | ||
0x4A: Block 0-7 | ||
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0x01 | |
3 | 0x29 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | 0x00 |
Controls a firmware based watchdog timer. Unattended systems requiring maximum up-time might use this capability to reset the UE9 or the entire system. When any of the options are enabled, an internal timer is enabled which resets on any incoming Control communication. If this timer reaches the defined TimeoutPeriod before being reset, the specified actions will occur. Note that while streaming, data is only going out of the Control processor, so some other Control command will have to be called periodically to reset the watchdog timer.
If the watchdog is accidentally configured to reset the processors with a very low timeout period (such as 1 second), it could be difficult to establish any communication with the device. In such a case, the reset-to-default jumper can be used to turn off the watchdog (sets bytes 7-10 to 0). Power up the UE9 with a short from FIO2<=>SCL, then remove the jumper and power cycle the device again. This also returns Comm (Section 5.2.1) and Control (Section 5.3.2) settings to factory defaults.
The watchdog settings (bytes 7-10) are stored in non-volatile flash memory, so every call to this function where settings are changed causes a flash erase/write. The Control flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop the flash could be damaged.
Note: Do not call this function while streaming.
Table 5.3.13.1-1. WatchdogConfig Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×05 | |
3 | 0×09 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | 0×00 | |
7 | WatchdogOptions | |
Bit 7: Reserved (0) | ||
Bit 6: Reset Comm on Timeout | ||
Bit 5: Reset Control on Timeout | ||
Bit 4: Update Digital I/O B on Timeout | ||
Bit 3: Update Digital I/O A on Timeout | ||
Bit 1: Update DAC1 on Timeout | ||
Bit 0: Update DAC0 on Timeout | ||
8-9 | TimeoutPeriod | |
10 | DIOConfigA | |
Bit 7: State | ||
Bit 4-0: Digital IO # | ||
11 | DIOConfigB | |
Bit 7: State | ||
Bit 4-0: Digital IO # | ||
12 | DAC0 (LSB) | |
13 | DAC0 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bits of output | ||
14 | DAC1 (LSB) | |
15 | DAC1 | |
Bit 7: Enabled | ||
Bits 3-0: Upper 4 bit of output | ||
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×01 | |
3 | 0×09 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | WatchdogOptions |
Reads the current watchdog settings.
Table 5.3.13.2-1. WatchdogRead Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x00 |
3 | 0x09 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x05 |
3 | 0x09 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | WatchdogOptions |
8-9 | TimeoutPeriod |
10 | DIOConfigA |
11 | DIOConfigB |
12-13 | DAC0 |
14-15 | DAC1 |
Controls a firmware based watchdog timer. Unattended systems requiring maximum up-time might use this capability to reset the UE9 or the entire system. When any of the options are enabled, an internal timer is enabled which resets on any incoming Control communication. If this timer reaches the defined TimeoutPeriod before being reset, the specified actions will occur. Note that while streaming, data is only going out of the Control processor, so some other Control command will have to be called periodically to reset the watchdog timer.
If the watchdog is accidentally configured to reset the processors with a very low timeout period (such as 1 second), it could be difficult to establish any communication with the device. In such a case, the reset-to-default jumper can be used to turn off the watchdog (sets bytes 7-10 to 0). Power up the UE9 with a short from FIO2<=>SCL, then remove the jumper and power cycle the device again. This also returns Comm (Section 5.2.1) and Control (Section 5.3.2) settings to factory defaults.
The watchdog settings (bytes 7-10) are stored in non-volatile flash memory, so every call to this function where settings are changed causes a flash erase/write. The Control flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop the flash could be damaged.
New features in the extended version:
Table 5.3.13.3-1. Extended WatchdogConfig Command Response
Command: | ||
Byte | ||
0 | Csum8 | |
1 | 0xF8 | |
2 | 0x0D | |
3 | 0x09 | |
4 | C16L | |
5 | C16H | |
6 | Write Mask | |
7 | SWDT settings | |
Bit 7: Reserved (0) | ||
Bit 6: Reset Comm on Timeout | ||
Bit 5: Reset Control on Timeout | ||
Bit 4: Update Digital I/O B on Timeout | ||
Bit 3: Update Digital I/O A on Timeout | ||
Bit 2: Enable Strict Mode | ||
Bit 1: Update DAC1 on Timeout | ||
Bit 0: Update DAC0 on Timeout | ||
8-9 | TimeoutPeriod | |
10 | DIO Response A | |
Bit 7: State | ||
Bit 4-0: Digital IO # | ||
11 | DIO Response B | |
Bit 7: State | ||
Bit 4-0: Digital IO # | ||
12 | DAC0 Response L | |
13 | DAC0 Response H | |
14 | DAC1 Response L | |
15 | DAC1 Response H | |
16-17 | Initial TimeoutPeriod | |
18 | Reserved | |
19 | Reserved | |
20 | Reserved | |
21 | Reserved | |
22 | Reserved | |
23 | Reserved | |
24 | Reserved | |
25 | Reserved | |
26 | Reserved | |
27 | Reserved | |
28 | Reserved | |
29 | Reserved | |
30 | Reserved | |
31 | Strict Key | |
Response: | ||
Byte | ||
0 | Csum8 | |
1 | 0xF8 | |
2 | 0x0D | |
3 | 0x09 | |
4 | C16L | |
5 | C16H | |
6 | Error Code | |
7 | SWDT settings | |
8-9 | TimeoutPeriod | |
10 | DIO Response A | |
11 | DIO Response B | |
12 | DAC0 Response L | |
13 | DAC0 Response H | |
14 | DAC1 Response L | |
15 | DAC1 Response H | |
16-17 | Initial TimeoutPeriod | |
18 | Reserved | |
19 | Reserved | |
20 | Reserved | |
21 | Reserved | |
22 | Reserved | |
23 | Reserved | |
24 | Reserved | |
25 | Reserved | |
26 | Reserved | |
27 | Reserved | |
28 | Reserved | |
29 | Reserved | |
30 | Reserved | |
31 | 0x00 |
WatchdogOptions: The watchdog is enabled when this byte is nonzero. Set the appropriate bit to reset either or both processors, update the state of 1 or 2 digital I/O, or update 1 or both DACs.
TimeoutPeriod: The watchdog timer is reset to zero on any incoming Control communication. Note that most functions consist of a write and read, but StreamData is outgoing only and does not reset the watchdog. If the watchdog timer is not reset before it counts up to TimeoutPeriod, the actions specified by WatchdogOptions will occur. The watchdog timer has a clock rate of about 1 Hz, so a TimeoutPeriod range of 1-65535 corresponds to about 1 to 65535 seconds.
Initial TimeoutPeriod: Timeout period that will be used until the first WatchDog clear.
DIOConfig#: Determines which digital I/O is affected by the watchdog, and the state it is set to. The digital I/O # is a value from 0-22 according to the following: 0-7 => FIO0-FIO7, 8-15 => EIO0-EIO7, 16-19 => CIO0-CIO3, 20-22 => MIO0-MIO2
DAC#: Specifies values for the DACs on watchdog timeout. The UE9 has 12-bit analog outputs, so pass an output value between 0 and 4095, plus set bit 7 of the high byte accordingly. If Bit7 is set on either DAC, then both are enabled. To disable the DACs (set to high-impedance), bit 7 must be 0 for both DACs.
Strict Key: Specifies a 1 byte key that must be passed to WatchDog Clear if strict is enabled.
When the Watchdog is operating in strict mode this is the only function that will reset the Watchdog timer.
This function will return an error if the watchdog is not in strict mode or if the key does not match.
Table 5.3.13.4-1. WatchdogClear Command Response
Command: | |
Byte | Meaning |
0 | Csum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x0D |
4 | Csum16 L |
5 | Csum16 H |
6 | Key |
7 | Reserved |
Response: | |
Byte | Meaning |
0 | Csum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x0D |
4 | Csum16 L |
5 | Csum16 H |
6 | Error Code |
7 | Reserved |
Control command causes a soft or hard reset. Affects both processors.
Table 5.3.15-1. Reset command response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0x99 | |
2 | ResetOptions | |
Bit 1: Hard Reset | ||
Bit 0: Soft Reset | ||
3 | 0x00 | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0x99 | |
2 | 0x00 | |
3 | Errorcode |
Control command sends and receives serial data using SPI synchronous communication.
Table 5.3.16-1. SPI Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 4 + NumSPIWords | |
3 | 0×3A | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | SPIOptions | |
Bit 7: AutoCS | ||
Bit 6: DisableDirConfig | ||
Bits 1-0: SPIMode (0=A, 1=B, 2=C, 3=D) | ||
7 | SPIClockFactor | |
8 | Reserved | |
9 | CSPinNum | |
10 | CLKPinNum | |
11 | MISOPinNum | |
12 | MOSIPinNum | |
13 | NumSPIBytesToTransfer | |
14 | SPIByte0 | |
… | … | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 1 + NumSPIWords | |
3 | 0×3A | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | NumSPIBytesTransferred | |
8 | SPIByte0 | |
… | … |
The initial state of SCK is set properly (CPOL), by this function, before CS (chip select) is brought low (final state is also set properly before CS is brought high again). If CS is being handled manually, outside of this function, care must be taken to make sure SCK is initially set to CPOL before asserting CS.
All standard SPI modes supported (A, B, C, and D).
Mode A: CPOL=0, CPHA=0
Mode B: CPOL=0, CPHA=1
Mode C: CPOL=1, CPHA=0
Mode D: CPOL=1, CPHA=1
If Clock Phase (CPHA) is 1, data is valid on the edge going to CPOL. If CPHA is 0, data is valid on the edge going away from CPOL. Clock Polarity (CPOL) determines the idle state of SCK.
Up to 240 bytes can be written/read. Communication is full duplex so 1 byte is read at the same time each byte is written.
Control command configures the UE9 UART for asynchronous communication.
The UE9 has a UART available that supports asynchronous serial communication. The UART connects to the PIN2/PIN20 (TX0/RX0) pins on the DB37 connector.
Communication is in the common 8/n/1 format. Similar to RS232, except that the logic is normal CMOS/TTL. Connection to an RS232 device will require a converter chip such as the MAX233, which inverts the logic and shifts the voltage levels.
This serial link is not an alternative to the USB connection. Rather, the host application will write/read data to/from the UE9 over USB, and the UE9 communicates with some other device using the serial protocol. Using this serial protocol is considered an advanced topic. A good knowledge of the protocol is recommended, and a logic analyzer or oscilloscope might be needed for troubleshooting.
Table 5.3.17-1. AsynchConfig Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×02 | |
3 | 0×14 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | 0×00 | |
7 | AsynchOptions | |
Bit 7: Update | ||
Bit 6: UARTEnable | ||
Bit 5: Reserved | ||
8-9 | BaudFactor16 | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×02 | |
3 | 0×14 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | AsynchOptions | |
8-9 | BaudFactor16 |
Control command sends bytes to the UE9 UART which will be sent asynchronously on the PIN2 (TX0) pin on the DB37 connector.
Table 5.3.18-1. AsynchTX Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 1 + NumAsynchWords |
3 | 0×15 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0×00 |
7 | NumAsynchBytesToSend |
8 | AsynchByte0 |
… | … |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0×02 |
3 | 0×15 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | NumAsynchBytesSent |
8 | NumAsynchBytesInRXBuffer |
9 | 0×00 |
Control command reads the oldest 32 bytes from the UE9 UART RX buffer. The buffer holds 256 bytes.
Table 5.3.19-1. AsynchRX Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0×01 |
3 | 0×16 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0×00 |
7 | Flush |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0×11 |
3 | 0×16 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | NumAsynchBytesInRXBuffer |
8 | AsynchByte0 |
… | … |
39 | AsynchByte31 |
Control command sends and receives serial data using I²C synchronous communication.
Table 5.3.20-1. I2C Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 4 + NumI2CWordsSend | |
3 | 0x3B | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | I2COptions | |
Bits 7-5: Reserved | ||
Bit 3: Enable clock stretching. | ||
Bit 2: No stop when restarting. | ||
Bit 1: ResetAtStart | ||
Bit 0: Reserved | ||
7 | SpeedAdjust | |
8 | SDAPinNum | |
9 | SCLPinNum | |
10 | AddressByte | |
11 | Reserved | |
12 | NumI2CBytesToSend | |
13 | NumI2CBytesToReceive | |
14 | I2CByte0 | |
... | ... | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 3 + NumI2CWordsSend | |
3 | 0x3B | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | Reserved | |
8 | AckArray0 | |
9 | AckArray1 | |
10 | AckArray2 | |
11 | AckArray3 | |
12 | I2CByte0 | |
... | ... |
Control command reads temperature and humidity from a Sensirion SHT1X sensor (which is used by the EI-1050). For more information, see the EI-1050 datasheet, and the SHT1X datasheet from sensirion.com.
Table 5.3.21-1. SHT1X Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0×02 |
3 | 0×39 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | DataPinNum (0-22) |
7 | ClockPinNum (0-22) |
8 | Reserved |
9 | Options |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0×05 |
3 | 0×39 |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | 0×00 |
8 | StatusReg |
9 | StatusRegCRC |
10-11 | Temperature |
12 | TemperatureCRC |
13-14 | Humidity |
15 | HumidityCRC |
This function loads a list of binary values that the DACs will output to generate waveforms. Each time stream starts a scan the DAC are set to the next value in their lists. StreamDAC is run by the stream subsystem, so Stream Config needs to be called to set frequency, Stream Start will begin waveform generation and Stream Stop will halt generation.
Table 5.3.22-1. StreamDAC Command Response
Command: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×12 | |
3 | 0×12 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Number of Points | |
7 | Reserved | |
8 | Reserved | |
9 | StreamDAC Config | |
Bit 7: 1=DAC1, 0=DAC0 | ||
Bits [0:2]: Block number (0-7) | ||
10 | DAC Value (0 + 16 * BlockNum) L | |
11 | DAC Value (0 + 16 * BlockNum) H | |
… | ||
40 | DAC Value (15 + 16 * BlockNum) L | |
41 | DAC Value (15 + 16 * BlockNum) H | |
Response: | ||
Byte | ||
0 | Checksum8 | |
1 | 0xF8 | |
2 | 0×01 | |
3 | 0×12 | |
4 | Checksum16 (LSB) | |
5 | Checksum16 (MSB) | |
6 | Errorcode | |
7 | 0×00 |
To enable StreamDAC set the number of points to a value greater than zero, to disable set the value to zero.
When loading multiple blocks of points, byte 6 (Number of Points) should be set to the total number of points the DAC should cycle through.
Up to 128 points can be loaded, 16 at a time. Use bits [0:2] in byte 9 to select which block of 16 is being loaded.
Executing this function causes the current or last used values (or the factory defaults) to be stored in flash as the power-up defaults.
The UE9 flash has a rated endurance of at least 20000 writes, which is plenty for reasonable operation, but if this function is called in a high-speed loop the flash could eventually be damaged.
Note: Do not call this function while streaming.
Table 5.3.23-1. SetDefaults Command Response
Command: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x0E |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | 0xBA (0x82) |
7 | 0x26 (0xC7) |
Response: | |
Byte | |
0 | Checksum8 |
1 | 0xF8 |
2 | 0x01 |
3 | 0x0E |
4 | Checksum16 (LSB) |
5 | Checksum16 (MSB) |
6 | Errorcode |
7 | 0x00 |
Reads the power-up defaults from flash (Read the current configuration).
Table 5.3.24-1.
Command: | Defaults Map | |||||
Byte | Block Number | Byte Offset | Description | Nominal Values | ||
0 | Checksum8 | 0 | 0-3 | Not Used | 0x00 | |
1 | 0xF8 | 0 | 4 | FIO Directions | 0x00 | |
2 | 0x01 | 0 | 5 | FIO States | 0xFF | |
3 | 0x0E | 0 | 6 | EIO Directions | 0x00 | |
4 | Checksum16 (LSB) | 0 | 7 | EIO States | 0xFF | |
5 | Checksum16 (MSB) | 0 | 8 | CIO Directions | 0x00 | |
6 | 0x00 | 0 | 9 | CIO States | 0xFF | |
7 | bits[0:6] BlockNum 0-7 | 0 | 10 | MIO Directions | 0x00 | |
bit 7: 1 = ReadCurrent | 0 | 11 | MIO States | 0xFF | ||
0 | 12-15 | Not Used | 0x00 | |||
Response: | 0 | 16 | Config Write Mask | 0x00 | ||
Byte | 0 | 17 | NumOfTimersEnabled | 0x00 | ||
0 | Checksum8 | 0 | 18 | Counter Mask | 0x00 | |
1 | 0xF8 | 0 | 19 | Pin Offset | 0x00 | |
2 | 0x11 | 0 | 20-31 | Not Used | 0x00 | |
3 | 0x0E | |||||
4 | Checksum16 (LSB) | 1 | 0 (32) | Clock_Source | 0x02 | |
5 | Checksum16 (MSB) | 1 | 1 (33) | Divisor | 0x00 | |
6 | Errorcode | 1 | 2-15 (34-47) | Not Used | 0x00 | |
7 | 0x00 | 1 | 16 (48) | TMR0 Mode | 0x0A | |
8-39 | Data | 1 | 17 (49) | TMR0 Value L | 0x00 | |
1 | 18 (50) | TMR0 Value H | 0x00 | |||
1 | 19 (51) | Not Used | 0x00 | |||
1 | 20 (52) | TMR1 Mode | 0x0A | |||
1 | 21 (53) | TMR1 Value L | 0x00 | |||
1 | 22 (54) | TMR1 Value H | 0x00 | |||
1 | 23 (55) | Not Used | 0x00 | |||
1 | 24 (56) | TMR2 Mode | 0x0A | |||
1 | 25 (57) | TMR2 Value L | 0x00 | |||
1 | 26 (58) | TMR2 Value H | 0x00 | |||
1 | 27 (59) | Not Used | 0x00 | |||
1 | 28 (60) | TMR3 Mode | 0x0A | |||
1 | 29 (61) | TMR3 Value L | 0x00 | |||
1 | 30 (62) | TMR3 Value H | 0x00 | |||
1 | 31 (63) | Not Used | 0x00 | |||
2 | 0 (64) | TMR4 Mode | 0x0A | |||
2 | 1 (65) | TMR4 Value L | 0x00 | |||
2 | 2 (66) | TMR4 Value H | 0x00 | |||
2 | 3 (65) | Not Used | 0x00 | |||
2 | 4 (68) | TMR5 Mode | 0x0A | |||
2 | 5 (69) | TMR5 Value L | 0x00 | |||
2 | 6 (70) | TMR5 Value H | 0x00 | |||
2 | 7-15 (71-79) | Not Used | 0x00 | |||
2 | 16-17 (80-81) | DAC0 (2 Bytes) | 0x0000 | |||
2 | 18-19 (82-83) | Not Used | 0x0000 | |||
2 | 20-21 (84-85) | DAC1 (2 Bytes) | 0x0000 | |||
2 | 22-31 (86-95) | Not Used | 0x00 | |||
3 | 0-15 (96-111) | AIN Res | 0x12 | |||
3 | 16-31 (112-127) | AIN BP/Gain | 0x00 | |||
4 | 0-15 (128-143) | AIN Settling | 0x00 | |||
4 | 16-31 (144-159) | Not Used | 0x00 |
This function performs 1-Wire communication.
For additional information on how to use this function, please see the 1-Wire App Note.
Table 5.3.25-1. 1-Wire Command Response
Command: | ||
Byte | ||
0 | Csum8 | |
1 | 0xF8 | |
2 | 0x1D | |
3 | 0x3C | |
4 | Csum16 L | |
5 | Csum16 H | |
6 | Options | |
Bit 0: DPU Control Enable | ||
Bit 1: DPU Polarity | ||
Bit 2: DPU Idle | ||
7 | Reserved | |
8 | Sense Pin | |
9 | DPU Pin | |
10 | Reserved | |
11 | ROM Function | |
12 | ROM0 (LSB) | |
13 | ROM1 | |
14 | ROM2 | |
15 | ROM3 | |
16 | ROM4 | |
17 | ROM5 | |
18 | ROM6 | |
19 | ROM7 (MSB) | |
20 | Reserved | |
21 | Num TX | |
22 | Reserved | |
23 | Num RX | |
24 | TX Byte 0 | |
… | ... | |
63 | TX Byte 39 | |
Response: | ||
Byte | ||
0 | Csum8 | |
1 | 0xF8 | |
2 | 0x1D | |
3 | 0x3C | |
4 | Csum16 L | |
5 | Csum16 H | |
6 | Error Code | |
7 | Reserved | |
8 | Reserved | |
9 | Warnings | |
Bit 0: No Devices Detected | ||
Bit 1: Type 1 interrupt (Not Tested) | ||
Bit 2: Type 2 interrupt (Not Supported) | ||
10 | Reserved | |
11 | Reserved | |
16 | Data 0 | |
… | … | |
63 | Data 47 |
Options: This byte provides control of the dynamic pull-up.
Bit 0: enables control of the DPU line.
Bit 1: sets the polarity of the switch. 1 = high on the specified DIO turns the switch on.
Bit 2: sets the idle state. 1 = DPU on while IDLE.
Sense Pin: This is the DIO on the LabJack that is connected to the data line of the 1-Wire bus.
DPU Pin: This is the DIO line that will control the dynamic pull-up if enabled in the options byte.
ROM Function: This byte specifies the function to be performed on the 1-Wire bus.
ROM[0:7]: This is the ROM of the target device or search path.
Num TX: This is the number of data bytes to transmit.
Num RX: This is the number of data bytes to receive.
Depending on the ROM function used the data returned can have different meanings. Refer to the following table for data definitions.
Table 5.3.25-2. ROM Functions
Parameter | Data Returned | |||
ROM Function: | Number | ROM | Bytes 0-7 | Bytes 8-15 |
Search ROM | 0xF0 | List of branches to take. | Discovered ROM Code | 1s indicate detected branches. |
Read ROM | 0x33 | None | ROM read from device | |
Match ROM | 0x55 | The specific ROM | ||
Skip ROM | 0xCC | |||
Alarm Search | 0xEC |
Additional information
UE9 control firmware v2.20 or later are required for 1-Wire.
Maxim has a 1-Wire App Note on Dynamic Pull-Ups, and another on the search algorithm. There are several kinds of 1-wire temperature sensors from Maxim(DS1820, DS1821, DS1822, DS18S20, and DS18B20). The most common part is probably the DS18B20. Note that these temperature sensors require about 750ms of time to resolve a temperature reading.
Table 5.4-1. Listing of all low-level function errorcodes
Error | Code (HEX) | Code (DEC) |
SCRATCH_WRT_FAIL | 0x01 | 1 |
SCRATCH_ERASE_FAIL | 0x02 | 2 |
DATA_BUFFER_OVERFLOW | 0x03 | 3 |
ADC0_BUFFER_OVERFLOW | 0x04 | 4 |
FUNCTION_INVALID | 0x05 | 5 |
SWDT_TIME_INVALID | 0x06 | 6 |
XBR_CONFIG_ERROR | 0x07 | 7 |
FLASH_WRITE_FAIL | 0x10 | 16 |
FLASH_ERASE_FAIL | 0x11 | 17 |
FLASH_JMP_FAIL | 0x12 | 18 |
FLASH_PSP_TIMEOUT | 0x13 | 19 |
FLASH_ABORT_RECIEVED | 0x14 | 20 |
FLASH_PAGE_MISMATCH | 0x15 | 21 |
FLASH_BLOCK_MISMATCH | 0x16 | 22 |
FLASH_PAGE_NOT_IN_CODE_AREA | 0x17 | 23 |
MEM_ILLEGAL_ADDRESS | 0x18 | 24 |
FLASH_LOCKED | 0x19 | 25 |
INVALID_BLOCK | 0x1A | 26 |
FLASH_ILLEGAL_PAGE | 0x1B | 27 |
FLASH_TOO_MANY_BYTES | 0x1C | 28 |
FLASH_INVALID_STRING_NUM | 0x1D | 29 |
SMBUS_INQ_OVERFLOW | 0x20 | 32 |
SMBUS_OUTQ_UNDERFLOW | 0x21 | 33 |
SMBUS_CRC_FAILED | 0x22 | 34 |
SHT1x_COMM_TIME_OUT | 0x28 | 40 |
SHT1x_NO_ACK | 0x29 | 41 |
SHT1x_CRC_FAILED | 0x2A | 42 |
SHT1X_TOO_MANY_W_BYTES | 0x2B | 43 |
SHT1X_TOO_MANY_R_BYTES | 0x2C | 44 |
SHT1X_INVALID_MODE | 0x2D | 45 |
SHT1X_INVALID_LINE | 0x2E | 46 |
STREAM_IS_ACTIVE | 0x30 | 48 |
STREAM_TABLE_INVALID | 0x31 | 49 |
STREAM_CONFIG_INVALID | 0x32 | 50 |
STREAM_BAD_TRIGGER_SOURCE | 0x33 | 51 |
STREAM_NOT_RUNNING | 0x34 | 52 |
STREAM_INVALID_TRIGGER | 0x35 | 53 |
STREAM_ADC0_BUFFER_OVERFLOW | 0x36 | 54 |
STREAM_SCAN_OVERLAP | 0x37 | 55 |
STREAM_SAMPLE_NUM_INVALID | 0x38 | 56 |
STREAM_BIPOLAR_GAIN_INVALID | 0x39 | 57 |
STREAM_SCAN_RATE_INVALID | 0x3A | 58 |
STREAM_AUTORECOVER_ACTIVE | 0x3B | 59 |
STREAM_AUTORECOVER_REPORT | 0x3C | 60 |
STREAM_SOFTPWM_ON | 0x3D | 61 |
STREAM_INVALID_RESOLUTION | 0x3F | 63 |
PCA_INVALID_MODE | 0x40 | 64 |
PCA_QUADRATURE_AB_ERROR | 0x41 | 65 |
PCA_QUAD_PULSE_SEQUENCE | 0x42 | 66 |
PCA_BAD_CLOCK_SOURCE | 0x43 | 67 |
PCA_STREAM_ACTIVE | 0x44 | 68 |
PCA_PWMSTOP_MODULE_ERROR | 0x45 | 69 |
PCA_SEQUENCE_ERROR | 0x46 | 70 |
PCA_LINE_SEQUENCE_ERROR | 0x47 | 71 |
TMR_SHARING_ERROR | 0x48 | 72 |
EXT_OSC_NOT_STABLE | 0x50 | 80 |
INVALID_POWER_SETTING | 0x51 | 81 |
PLL_NOT_LOCKED | 0x52 | 82 |
INVALID_PIN | 0x60 | 96 |
PIN_CONFIGURED_FOR_ANALOG | 0x61 | 97 |
PIN_CONFIGURED_FOR_DIGITAL | 0x62 | 98 |
IOTYPE_SYNCH_ERROR | 0x63 | 99 |
INVALID_OFFSET | 0x64 | 100 |
IOTYPE_NOT_VALID | 0x65 | 101 |
INVALID_CODE | 0x66 | 102 |
UART_TIMEOUT | 0x70 | 112 |
UART_NOTCONNECTED | 0x71 | 113 |
UART_NOTENALBED | 0x72 | 114 |
I2C_BUS_BUSY | 0x74 | 116 |
TOO_MANY_BYTES | 0x76 | 118 |
TOO_FEW_BYTES | 0x77 | 119 |
DSP_PERIOD_DETECTION_ERROR | 0x80 | 128 |
DSP_SIGNAL_OUT_OF_RANGE | 0x81 | 129 |
MODBUS_RSP_OVERFLOW | 0x90 | 144 |
MODBUS_CMD_OVERFLOW | 0x91 | 145 |
The UE9 supports the Modbus protocol over Ethernet and USB. Learn more about it on the Modbus support page.
This information is only needed when using low-level functions and other ways of getting binary readings. Readings in volts already have the calibration constants applied. The UD driver, for example, normally returns voltage readings unless binary readings are specifically requested.
Calibration Constant
The majority of the UE9's analog interface functions return or require binary values. Converting between binary and voltages requires the use of calibration constants and formulas.
When using Modbus the UE9 will apply calibration automatically, so voltages are sent to and read from the UE9 are formatted as a float.
Which Constants Should I Use?
The calibration constants stored on the UE9 can be categorized as follows:
Analog Input: Since the UE9 uses multiplexers, all channels (except 129-135 and 137-143) have the same calibration for a given input range.
Analog Output: Only two calibrations are provided, one for DAC0 and one for DAC1.
Internal Temperature: This calibration is applied to the binary reading from channel 133 or channel 141 (internal temp).
UE9 Input Ranges
The UE9 input ranges can be found in section 2.7.2. For your convenience, that table has been provided again below.
Table 2.7.2-1. Nominal Analog Input Voltage Ranges
Gain | Max V | Min V | |
Unipolar | 1 | 5.07 | -0.01 |
Unipolar | 2 | 2.53 | -0.01 |
Unipolar | 4 | 1.26 | -0.01 |
Unipolar | 8 | 0.62 | -0.01 |
Bipolar | 1 | 5.07 | -5.18 |
UE9 Calibration Formulas (Analog In)
The readings returned by the analog inputs are raw binary values (low level functions). An approximate voltage conversion can be performed as:
Volts(uncalibrated) = (Bits/65536)*Span (Single-Ended)
Volts(uncalibrated) = (Bits/65536)*Span – Span/2 (Differential)
Where span is the maximum voltage minus the minimum voltage from the table above. For a proper voltage conversion, though, use the calibration values (Slope and Offset) stored in the internal flash on the Control processor.
Volts = (Slope * Bits) + Offset
UE9 Calibration Formulas (Analog Out)
Writing to the UE9's DAC require that the desired voltage be converted into a binary value. To convert the desired voltage to binary select the Slope and Offset calibration constants for the DAC being used and plug into the following formula.
Bits = (DesiredVolts * Slope) + Offset
UE9 Calibration Formulas (Internal Temp)
Internal Temperature can be obtained by reading channel 133/141 and applying the following formula.
Temp (K) = Bits * TemperatureSlope
UE9 Calibration Constants
The table below shows where the various calibration values are stored in the Mem area. Generally when communication is initiated with the UE9, three calls will be made to the ReadMem function to retrieve the first 3 blocks of memory. This information can then be used to convert all analog input readings to voltages. The high level Windows DLL does this automatically.
Table 5.6-1. Calibration Constant Memory Locations
Starting | ||||
Block # | Byte | Normal ADC | Nominal Value | |
0 | 0 | Slope, Unipolar G=1 | 7.7503E-5 | volts/bit |
0 | 8 | Offset, Unipolar G=1 | -1.2000E-2 | volts |
0 | 16 | Slope, Unipolar G=2 | 3.8736E-5 | volts/bit |
0 | 24 | Offset, Unipolar G=2 | -1.2000E-2 | volts |
0 | 32 | Slope, Unipolar G=4 | 1.9353E-5 | volts/bit |
0 | 40 | Offset, Unipolar G=4 | -1.2000E-2 | volts |
0 | 48 | Slope, Unipolar G=8 | 9.6764E-6 | volts/bit |
0 | 56 | Offset, Unipolar G=8 | -1.2000E-2 | volts |
1 | 0 | Slope, Bipolar G=1 | 1.5629E-04 | volts/bit |
1 | 8 | Offset, Bipolar G=1 | -5.176 | volts |
Starting | ||||
Block # | Byte | Miscellaneous | Nominal Value | |
2 | 0 | Slope, DAC0 | 8.4259E+02 | volts/bit |
2 | 8 | Offset, DAC0 | 0.0000E+00 | volts |
2 | 16 | Slope, DAC1 | 8.4259E+02 | volts/bit |
2 | 24 | Offset, DAC1 | 0.0000E+00 | volts |
2 | 32 | Slope, Temp (133/141) | 1.2968E-02 | degK/bit |
2 | 48 | Slope, Temp (133/141, Low) | 1.2968E-02 | degK/bit |
2 | 64 | Cal Temp | 2.9815E+02 | degK |
2 | 72 | Vref | 2.4300E+00 | volts |
2 | 80 | Reserved | ||
2 | 88 | Vref/2 (129/137) | 1.2150E+00 | volts |
2 | 96 | Slope, Vs (132/140) | 9.2720E-05 | volts/bit |
Starting | ||||
Block # | Byte | Hi-Res ADC (UE9-Pro) | Nominal Value | |
3 | 0 | Slope, Unipolar G=1 | 7.7503E-05 | volts/bit |
3 | 8 | Offset, Unipolar G=1 | -1.2000E-02 | volts |
4 | 0 | Slope, Bipolar G=1 | 1.5629E-04 | volts/bit |
4 | 8 | Offset, Bipolar G=1 | -5.1760E+00 | volts |
Format of the Calibration Constants
Each value is stored in 64-bit fixed point format (signed 32.32 little endian, 2's complement). Following are some examples of fixed point arrays and the associated floating point double values.
Table 5.6-2. Fixed Point Conversion Examples
Fixed Point Byte Array | |
(LSB, ..., MSB) | Floating Point Double |
{0,0,0,0,0,0,0,0} | 0.0000000000 |
{0,0,0,0,1,0,0,0} | 1.0000000000 |
{0,0,0,0,255,255,255,255} | -1.0000000000 |
{51,51,51,51,0,0,0,0} | 0.2000000000 |
{205,204,204,204,255,255,255,255} | -0.2000000000 |
{73,20,5,0,0,0,0,0} | 0.0000775030 |
{225,122,20,110,2,0,0,0} | 2.4300000000 |
{102,102,102,38,42,1,0,0} | 298.1500000000 |